• JEDEC JESD22-B112A

JEDEC JESD22-B112A

  • PACKAGE WARPAGE MEASUREMENT OF SURFACE-MOUNT INTEGRATED CIRCUITS AT ELEVATED TEMPERATURE
  • standard by JEDEC Solid State Technology Association, 10/01/2009
  • Category: JEDEC

$74.00 $37.00

The purpose of this test method is to measure the deviation from uniform flatness of an integrated circuit package body for the range of environmental conditions experienced during the surface-mount soldering operation.
PDF

All of our standards document are available in PDF (Portable Document Format), an electronic, downloadable format.You will be able to download the file in your account downloads.

Multi-User Access

After purchasing, you have the ability to assign each license to a specific user.

Printable

At any time, you are permitted to make printed copies for your and your members' reference use.

JEDEC JESD251

JEDEC JESD251

EXPANDED SERIAL PERIPHERAL INTERFACE (xSPI) FOR NON VOLATILE MEMORY DEVICES, VERSION 1.0..

$58.00 $116.00

JEDEC JEP132A

JEDEC JEP132A

PROCESS CHARACTERIZATION GUIDELINE..

$39.00 $78.00

JEDEC JEP001-2A

JEDEC JEP001-2A

FOUNDRY PROCESS QUALIFICATION GUIDELINES - FRONT END TRANSISTOR LEVEL (Wafer Fabrication Manufacturi..

$39.00 $78.00

JEDEC JEP001-3A

JEDEC JEP001-3A

FOUNDRY PROCESS QUALIFICATION GUIDELINES - PRODUCT LEVEL (Wafer Fabrication Manufacturing Sites)..

$36.00 $72.00