• JEDEC JESD 22-A108C

JEDEC JESD 22-A108C

  • TEMPERATURE, BIAS, AND OPERATING LIFE
  • standard by JEDEC Solid State Technology Association, 06/01/2005
  • Category: JEDEC

$54.00 $27.00

A revised method for determining the effects of bias conditions and temperature, over time, on solid state devices is now available. Revision B of A108 includes low temperature operating life (LTOL) and high temperature gate bias (HTGB) stress conditions, revised cool down requirements for high temperature stress, and a procedure to follow if parts are not tested within the allowed time window.
PDF

All of our standards document are available in PDF (Portable Document Format), an electronic, downloadable format.You will be able to download the file in your account downloads.

Multi-User Access

After purchasing, you have the ability to assign each license to a specific user.

Printable

At any time, you are permitted to make printed copies for your and your members' reference use.

JEDEC JESD 37

JEDEC JESD 37

STANDARD LOGNORMAL ANALYSIS OF UNCENSORED DATA, AND OF SINGLY RIGHT -CENSORED DATA UTILIZING THE PER..

$38.00 $76.00

JEDEC JESD 320-A (R2002)

JEDEC JESD 320-A (R2002)

CONDITIONS FOR MEASUREMENT OF DIODE STATIC PARAMETERS..

$24.00 $47.00

JEDEC JESD18-A

JEDEC JESD18-A

STANDARD FOR DESCRIPTION OF FAST CMOS TTL COMPATIBLE LOGIC..

$40.00 $80.00

JEDEC JESD8-2

JEDEC JESD8-2

ADDENDUM No. 2 to JESD8 - STANDARD FOR OPERATING VOLTAGES AND INTERFACE LEVELS FOR LOW VOLTAGE EMITT..

$26.00 $51.00